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		<title>Exposure on Infrared Quartz Heat Solutions</title>
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		<description>Recent content in Exposure on Infrared Quartz Heat Solutions</description>
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			<lastBuildDate>Thu, 25 Jun 2026 05:15:02 +0800</lastBuildDate>
		
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				<title>Post exposure bake (PEB) heater</title>
				<link>http://infra-quartz-heat.com/en/posts/post-exposure-bake-peb-heater/</link>
				<pubDate>Thu, 25 Jun 2026 05:15:02 +0800</pubDate>
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				<description>&lt;p&gt;&lt;img src=&#34;http://infra-quartz-heat.com/images/0a976f8a438e1a813cc995e9355a4471.png&#34; alt=&#34;Post exposure bake (PEB) heater&#34;&gt;&lt;/p&gt;&#xA;&lt;p&gt;Out on the lithography floor, PEB temperature error is a fast track to CD excursion and overlay drift. A 1°C non-uniformity across the wafer is enough to push &lt;a href=&#34;https://o-yate.net&#34;&gt;photoresist&lt;/a&gt; profiles out of spec and scrap hours of work. We built our post exposure bake (PEB) heaters to keep that thermal profile inside the process window, lot after lot.&#xA;&lt;strong&gt;What matters under the hood&lt;/strong&gt;&#xA;We run short-wave infrared (SWIR) halogen elements behind a quartz window for rapid, direct-coupled heating and sub-second response. Temperature uniformity across the wafer stays at ±0.1°C, and repeatability lands in milliseconds, so the same thermal budget lands on lot 1 and lot 1000. The module is cleanroom-ready for Class 1–100, with low outgassing materials and a particle-controlled path. Zero particle generation during bake isn’t a talking point—it’s verified by in-line particle monitoring right at the tool interface.&#xA;Why this matters in photoresist processing&#xA;The PEB step sits between exposure and development. That’s where chemical amplification finishes and line-width gets locked in. Our heater keeps that step stable with tighter control, cutting CD variance and the rework that comes with it. The same platform handles soft bake and hard bake recipes, with recipe-driven ramp and soak profiles that shorten cycle time &lt;a href=&#34;https://henruite.com&#34;&gt;without&lt;/a&gt; giving up profile control. And because SWIR heats the wafer directly instead of the chamber walls, energy use drops.&#xA;A few practical notes&#xA;Installation comes down to matching chamber footprint and tool bus interface. Before you integrate, confirm the mechanical envelope, coolant lines, and electrical drops.&#xA;SWIR gives you fast response, but you have to keep optical alignment and window cleanliness in check to preserve uniformity. Schedule window inspections and lamp replacements so the thermal profile stays intact over long production runs.&lt;/p&gt;</description>
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